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ISL97672B
Block Diagram
V IN : 4.5V~26.5V
45V*, 6x50mA
VIN
FAULT
10μH/1.5A
LX
4.7μF/50V
EN
VDC
REG
INTERNAL
BIAS
FAULT
FLAG
O/P SHORT
OVP
OVP
OSC & RAMP
/FLAG
COMP
SUM = 0
I MAX
LOGIC
FET
DRIVERS
ILIMIT
FAULT
FLAG
OPEN CKT, SHORT CKT
PGND
COMP
GM
AMP
8-BIT
DAC
DYNAMIC
HEADROOM
CONTROL
HIGHEST VF
STRING
DETECT
DETECTION
CH1
CH2
CH3
CH4
ISET
+
-
REF
GEN
+
-
1
2
3
4
CH5
CH6
* V IN = 12V
5
REF_ OVP REF_ VSC
6
+
-
PWM
DIMMING CONTROLLER
TEMP
ISL97672B
FIGURE 3. ISL97672B BLOCK DIAGRAM
SENSOR
Ordering Information
Pin Configuration
PART
NUMBER
(Notes 1, 2, 3)
ISL97672BIRZ
PART
MARKING
672B
PACKAGE
(Pb-Free)
20 Ld 3x4 QFN
PKG.
DWG. #
L20.3x4
ISL97672B
(20 LD 3X4 QFN)
TOP VIEW
ISL97672BIRZ-EVAL
Evaluation Board
20
19
18
17
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to Tech Brief TB347 for
details on reel specifications.
FAULT
VIN
1
2
16
15
OVP
CH5
2. These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
EN
VDC
PWM
/FLAG
3
4
5
6
14
13
12
11
CH4
CH3
CH2
CH1
3. For Moisture Sensitivity Level (MSL), please see device information
7
8
9
10
page for ISL97672B . For more information on MSL, please see Tech
Brief TB363 .
2
FN7995.1
November 22, 2013
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